Surface Mount Technology Advancements

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ROHM Semiconductor GmbH

Manufacturing PCBAs for Harsh Mission-Critical Industrial Environments

Industries such as oil and gas use electronic assemblies in very demanding environments. Drilling and exploration tools used two to three miles below the earth’s surface can cost upwards of €2 million Euro, and operate in environments up to 177o Celsius. This equipment must continue to perform with precision, despite high temperatures and pressure, vibration, mechanical shock and corrosive environments (oil, mud, moisture and chemicals).

PCBAs deployed in these environments require high-temperature solders that are not generally suited for current surface mount or automated pin through hole manufacturing. Most of these PCBA’s are still soldered manually. While high temperature Pb solders are excluded from the current RoHS legislation, there is an interest in alternative high temperature soldering materials, especially for environments up to 177o Celcius. This research will continue in 2015 and 2016, as OEMs and EMS companies work to develop better materials and processes.

Reducing Thermal Pad Voiding in BTC Devices

PCBs with BTCs are increasingly common, as BTCs have the advantage of offering good performance—both in signal integrity and thermal performance—at a relatively low cost. However, increasing pin count and package size and reduced pitch on BTCs creates production challenges. The increased pin-count allows more functionality, and manufacturing faces new challenges in producing reliable contacts with these large-surface-area devices.

The biggest challenge with BTC packages is thermal pad voiding. During the solder reflow process, chemicals or air can be trapped in the solder, creating voids that may impact thermal conductivity or solder joint reliability. Large voids can result in early product failures or long term reliability risks. Thermal pads present a unique challenge during reflow, as the pads are typically larger and connected to large copper areas within the PCB, and therefore taking longer to reflow than solder balls associated with signal pads.

Stencil design techniques, soldering materials, new processes and design for manufacturability practices are continuing efforts being practiced and fine-tuned to minimise voiding, while vacuum reflow is also being investigated with promising results.

Warpage of the Integrated Circuit Package

Integrated circuits (ICs) are often mounted in plastic packages to minimise cost. However, plastic is less stable than ceramic. When plastic packages are exposed to high temperatures during reflow, the package can warp 0.0508mm to 0.254mm or more, depending on the substrate, plastic material properties, package thickness and package size. A combination of package and PCB substrate dynamic warpage, along with PCB pad solderablity issues, means variations in printed solder paste volume can result in solder defects between a device and the PCB. Two common defects are HOP, or non-wet open (NWO) type defects.

While NWO defects create solder joints with no electrical continuity, HOP defects can be intermittent and/or unreliable. Therefore, testing for HOP defects is a challenge and time consuming. Resource intensive screening processes are needed in order to prevent products with these defects from getting into the field.

The JEDEC specification for package warpage, revised in 2005 and republished in 2009, allows for a maximum of 0.2032mm coplanarity at room temperature. Component suppliers usually provide specifications for room temperature co-planarity, using either the seating plane or regression plane measurement method. As long as the value is under 0.2032mm, the co-planarity is deemed within specification.

Empirical data suggests that the JEDEC specification is no longer adequate. For high pin count packages with small pads and lower solder volumes, production data suggests that component warpage exceeding 0.0889mm can cause problems during reflow, with a high potential for HOP defects. Manufacturers of consumer devices may discard or recycle defective boards, but this is not an option for an advanced computing or communications PCBA costing over ten thousand dollars. Time consuming and expensive 3D X-Ray testing is necessary with assemblies susceptible to HOP defects.

EMS providers and component suppliers will continue to drive changes to address these challenges including advocating for improved plastic material compounds, along with working with JEDEC to tighten the standard warpage specification to closer to 0.0889mm for high pin-count devices.

Closer Component Spacing Causes Rework Complexity

OEMs are focused on functionality and performance. The use of decoupling capacitors for noise reduction leads to designs with more interconnects and smaller components with tighter component spacing. New designs, with more demanding signal integrity requirements can result in conflicts between layout requirements and what can be manufactured.

With the conflicts between design requirements and process capability, rework is becoming a challenge. For some high performance computing and telecommunications PCBAs the cost of a single one may be €15,000, hence, it is imperative that the assembly is not damaged during rework. Furthermore, adequate spacing between components is also required to ensure that heat used for rework does not damage the solder joints of adjacent components, or the components themselves.

While IPC standards do not provide strict requirements for component spacing, and current SMT assembly processes can accommodate tight spacings, experience has shown that at least 5.08mm of space should be left around large ball-grid arrays to allow for rework. OEMs are placing decoupling capacitors as close as 1.02mm in order to optimise noise performance. EMS companies are working with equipment manufacturers to develop processes and adjust tooling to make reliable, repeatable rework possible, without inducing secondary reflow or additional rework of adjacent components. Although current solutions exist for keep-out space values well below 5.08mm, additional process development and tooling enhancements are necessary to achieve tighter component spacing.

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