JTAG use in functional testers on the rise

The era of ‘one test method fits all’ is well behind us. Even when faced with the most modest diversity of products, trying to formulate a test policy is becoming an increasingly tricky balancing act.

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What’s more as many of the low-cost high volume manufacturing facilities move east to Asia and other low-cost bases then so to do the high-volume, high-cost testers - predominantly In-Circuit Test (ICT). In Europe and North America meanwhile test professionals are adjusting to the role of testing lower volume, yet often high value products, by undertaking more functional style tests using generic functional testers.

Functional testers (FT) are built to stimulate and monitor the function of a system (usually a PCB assembly) by emulating its function using precision test and measurement instruments (typically signal sources, pattern generators, oscilloscopes, counters etc.). However unlike ICT machines the developer of a FT solution requires in-depth knowledge of the PCBA operation if they are to test right to the kernel of the board. This knowledge requires skill and time to acquire which in-turn means high costs.

JTAG boundary-scan test technology however can automate the in-depth testing of many digital and mixed-signal designs and can easily be added into functional testers - provided the JTAG solution vendor offers the appropriate driver packages.

JTAG Technologies has invested heavily in the development of integration options for a range of automatic test equipment (ATE) and functional test platforms. One of the most popular of these platforms is for National Instruments’ LabVIEW and is known as PIP/LV (Production Integration Package for LabVIEW).

Using PIP/LV functional test developers are able to harness all the automated test generation features of ProVision, a processing tool that will import the UUTs (Unit Under Test) CAD-derived netlist(s) along with boundary-scan device (BSDL) model and proprietary models (supporting over 100 000 devices to date) that describe the function of non-boundary-scan parts, often referred to as clusters.

The resulting test programs, once verified inside ProVision, can be released to the functional tester platform and invoked through a series of LabVIEW VIs (Virtual Instrument icons) that form PIP/LV. What’s more in addition to board test code ProVision can generate applications to program flash devices (NOR, NAND and serial) and can also handle the configuration of nearly all programmable logic parts (CPLDs, FPGAs, config PROMs etc.)

Scripted test solutions with JTAG

Originally developed to run under the open-source Python scripting language, JTAG Functional Test (JFT) routines offer access to low-level control of a JTAG device’s pins. Use JFT to set or toggle a single pin or group them together as a bus that can be set as a program variable. JFT makes it easy to create test programs with loops, conditional branching and limits testing, what’s more the module approach allows test engineers to create re-usable code blocks that can be transferred between test projects.

In 2013 the JFT concept was ported to a number of other platforms including National Instruments’ LabVIEW and makes the perfect accompaniment to low cost functional tester platforms. By gaining access to the pins of high-density FPGA, microprocessors and DSPs test engineers are afforded access to kernel of the design in a safe and predictable manner.

Figure 1 shows how boundary-scan access to an FPGA can assist in testing a D-A converter device, in conjunction with a DVM – a simple task with JFT/LabVIEW and VISA driver for the DVM. The alternative functional test mechanism would involve writing specific test firmware that also requires partial functioning and boot-up of the UUT before the test can begin.

In addition to the software resources JTAG Technologies also offer high-integrity connection systems compatible with leading ATE connector vendors MAC Panel and Virginia Panel. For use with PXI(e) format boundary-scan controllers these connection systems include active signal conditioning for the JTAG test access port signals and additional IO channels.

The ATE market in Western Europe

The ATE market in Western Europe appears to have changed significantly in the past 10-15 years. Where in-circuit testers were once king, various combinations of functional, structural and boundary-scan are used to suit a particular strategy - quite often dictated by the product/UUT itself. At the one end of the spectrum it is possible to build a mini boundary-scan based ATE using JTAG Technologies MIOS testers that feature JTAG TAPs, digital I/O and analogue I/O all in one. Coupled with NI’s LabView and the versatile LabView JFT packages you can develop a capable custom mini-ATE for about £6000. Other options available include the integration of power supplies, JTAG and IO resources within a re-configurable cassette-based fixture. While at the top end (prices typically start from £20000) you can consider the fully flexible series of ATE that use VPC or MAC Panel fixture interfaces and can incorporate a full range of PXI, LXI and even legacy GPIB instruments for a range of test processes including RF and microwave .

* Peter van den Eijnde is Co-founder and Director of JTAG Technologies in Eindhoven.

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